An industry survey some three years ago indicated only about one-quarter of all chip designers were using dynamic voltage and frequency scaling (DVFS). It’s likely most of those people who said they were implementing DVFS are deeply dependent upon a mobile operating system. For instance, Android offers a range of CPU governor software modules to optimize frequency and voltage levels for application throughput. While DVFS is already enabled in most hardened CPU and GPU cores, clusters and/or subsystems, the majority of SoC designers not tied to Android opt for simpler techniques like clock and power gating. Is there an opportunity for a more holistic DVFS approach that more SoC designers would embrace? “DVFS is Dead, Long Live Holistic DVFS”
Posts by Don Dingee
Don Dingee has been in the electronics industry since 1983, with experience spanning engineering, sales, marketing, and web development roles. He is co-author of "Mobile Unleashed," a short history of ARM architecture, and has freelanced on embedded, mobile, and IoT topics including blogging on SemiWiki for several years. Don is now Chief Strategy Officer at Vant Marketing, a full-service digital marketing agency in New Braunfels, TX.
Taking Energy Back from Next-Generation MCU Designs
Microamp-per-megahertz thinking served the microcontroller (MCU) community well for decades. As the focus shifts to connectivity and always-on use cases, bigger cores and wireless IP blocks push energy use in the wrong direction. Next-generation MCUs can ill afford to spend more energy just to manage themselves. Any mandatory software to make an MCU run usually frustrates customers considering design-ins. How does the MCU ecosystem manage energy moving forward? “Taking Energy Back from Next-Generation MCU Designs”
Free Trial Explores EPU IP and Automation
Last summer at 53DAC in Austin, Sonics rolled out a seminar with a formative strategy for its Energy Processing Unit, or EPU. After that session, I summarized the idea in my SemiWiki blog:
“The premise of an EPU is that power savings using software, even in a dedicated microcontroller, is relatively slow, perhaps 50 to 500 times slower than what hardware-based power control can handle. Faster speeds mean narrower moments of idle time can be exploited to save energy, and distributed, autonomous, deadlock-free ICE-Grain controllers mean many more of those moments can be processed all over the system-on-chip (SoC) – leaving the CPU to do real work.” “Free Trial Explores EPU IP and Automation”